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DIGITAL LOGIC DESIGN BY BRIAN HOLDSWORTH PDF

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Digital Logic Design, 4th Edition. 1 review. by Clive Woods, Brian Holdsworth. Publisher: Newnes. Release Date: November ISBN: Preface to the fourth edition In this newly revised edition of DigitalLogicDesign, we have taken the opportunity to undertake extensive revisions. This books (Digital Logic Design [PDF]) Made by BRIAN HOLDSWORTH About Books A To Download Please Click.


Digital Logic Design By Brian Holdsworth Pdf

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Digital Logic Design, Fourth Edition Brian Holdsworth, Clive Woods books to read online, online library, greatbooks to read, PDF best books to read, top books . Digital Logic Design - 4th Edition - ISBN: , Authors: Brian Holdsworth Clive Woods DRM-free (EPub, PDF, Mobi). × DRM- . Clive Woods and the staff at Newnes would like to dedicate this book to the memory of Brian Holdsworth, who wrote the first edition of Digital Logic Design for.

As an example of this process 0. Octal Binary 0 1 2 3 4 5 6 7 a Figure 1. The octal digits from 0 to 7 inclusive can each be represented by three binary digits as shown in Figure 1. To find the octal representation of a string of binary digits it is divided into groups of three, beginning from the least significant digit. The octal equivalent for each group of three digits is then written down with the aid of the conversion table as shown below: If the binary number has a fractional part then, to find the octal fractional part, divide the binary fractional number into groups of three beginning at the binary point and moving to the right.

The corresponding octal equivalents for each group of three are then found in the conversion table. For example: Number systems and codes 5 Similarly, each of the sixteen hexadecimal digits can be represented by four binary digits as shown in Figure 1. To convert a binary number into hexadecimal, divide the integral digits into groups of four, beginning at the binary point and moving left; and divide the fractional digits into groups of four beginning at the binary point and moving right.

Each group of four binary digits is then replaced by its hexadecimal equivalent from the conversion table as illustrated in the following example: For example" 4 F 9 C 2 16 - 2 1. It will be observed that the carry ripples through the addition from the 20 column to the 23column. Carry ripple is a significant problem that has to be taken into account in the design of addition circuits. The additional bit generated is termed arithmetic overflow. In pencil and paper calculations the extra digit does not create a problem.

However in a digital machine, prior to the addition, the augend and addend may be stored in separate registers and after it has been performed the sum may well be returned to one of these two registers.

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In this case an extra bit must be provided in the register containing the sum to store the overflow. The borrow-out can be used in a digital machine to set a 1-bit register and in doing so will indicate that the difference is negative. Arithmetic underflow is illus- trated by the following example: Minuend 0 0 1 1 Subtrahend 1 1 0 0 Difference 0 1 1 1.

If arithmetic underflow occurs the borrow out indicates that the subtrahend is greater than the minuend. Otherwise the two numbers are either equal or the minuend is greater than the subtrahend. It is important that there should be a distinction made between positive and negative numbers in a machine.

A sign digit can be used to provide this distinction. A negative number is identified by a 1 that appears in the most significant bit MSB position whilst a positive number is identified by a 0 in that position, so that: Number systems and codes 7. This is termed signed magnitude representation. Because the design of a logic circuit capable of numerical computation in signed magnitude representation is somewhat complex it is rarely used. In practice, numerical computation in a machine is performed using complement arithmetic.

In practice, when using complement arithmetic, the process of subtraction becomes one of addition. In any number system two complements are available. In the binary system they are a the 2's complement or radix complement, and b 1's complement or diminished radix complement. For the decimal system they are: It is worth noting that the use of the l's complement in the binary system raises certain hardware implementation difficulties so that signed arithmetic processes are invariably per- formed using 2's complement notation.

In the first method, all the digits are inverted and a 1 is added in the least significant place. For the second method, the lowest order 1 in X is sensed, and all succeeding higher digits are inverted. Examples of these two methods follow: Alternatively, it is negative if its MSB is 1. Magnitude X S.

This process called sign extension is illustrated in the following examples: It will also be observed that zero in this system is regarded as positive since its sign bit is 0. The diminished radix complement, as in all number systems, is one less than the radix complement.

The com- plement is only taken in the case of negative numbers. Examples of 8-bit numbers in the l's complement representation follow: For these reasons the 2's complement represen- tation is generally preferred for numerical computations in a digital machine. The table in Figure 1.

For positive numbers the sign bit is 1 and for negative numbers it is 0. In the four representations described, with the exception of offset binary, positive numbers remain unchanged when signed.

Subtrahends are regarded as negative numbers and are converted to their 2's complement form.

They are then added to the positive minuend. When adding two negative numbers they are both converted to their 2's complement form before addition takes place. Six possible cases are considered for the addition and subtraction of two 8-bit numbers where the MSB represents the sign digit and is given a negative weighting of The incorrect answer is obtained because the sum, , cannot be represented by seven binary digits and arithmetic overflow has occurred from the magnitude section into the position occupied by the sign digit.

Subtrahend in 2's complement form. Difference found by addition. If the working registers happen to be 8-bits wide the carry out is auto- matically lost. It will be observed that the numerical value of the subtrahend can be obtained directly from its 2's complement representation by including the negative weighting of the sign digit in the numerical evaluation.

True magnitude is found by taking the 2's complement of the sum as shown below. Both numbers are expressed in 2's complement form. A carry is generated out of the sign bit position which has to be discarded.

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As in the previous case the magnitude is found by taking the 2's complement of the sum. The correct answer cannot be represented by seven binary digits.

Figure 1. It will be recalled that 2 n -- X has previously been defined as the 2's complement of X and it dd44 11C I00 Number systems and codes 13 follows that a correct answer is obtained by adding the 2's complement of the subtrahend to the minuend.

Subtrahend in l's complement form. Both numbers expressed in l's complement form. Multiplicand Multiplier Figure 1. A set of rules for the process of multiplication can be stated as follows: If the least significant bit LSB of the multiplier is 1 write down the multiplicand and shift one place left. If the LSB of the multiplier is 0 write down a number of 0s equal to the number of bits in the multiplicand and shift one place left.

For each bit of the multiplier repeat either 1 or 2. Add all the partial products to form the final product. Such a set of rules is called an algorithm which the digital designer can, if required, implement in hardware. In practice, the hardware implementation of the multiplication of unsigned numbers differs from the pencil and paper method in one important aspect.

The partial products are accumulated as they are generated rather than all being added together at the end. An example of the shift and add technique is given below: Add MD 11 13 1.

Providing the multiplicand and the multiplier are both positive, the shift and add process is valid. Number systems and codes 15 However, assuming that the multiplier or the multiplicand, or both, are negative, 2's complement arithmetic must be employed.

Digital Logic Design

The introduction of the sign digits and the use of the 2's complement form for negative numbers introduces a number of complications. Correction factors are required for certain cases and the required correc- tion methods lead to complicated logic correction circuits.

An alternative and more elegant method is due to A D Booth. With this scheme the procedure is the same regardless of signs.

The method is beyond the scope of this introductory treatment of number systems and the reader is recommended to consult Lewin see bibliography. Complement arithmetic is used so that the subtraction operation becomes an addition. This is illustrated in the following two examples which cover the two conditions described previously. The division process can be regarded as one of repeated subtraction of the divisor X from the dividend Y. The division equation may be written as: When the divisor is to be subtracted from the dividend or a partial remainder, there are only two possibilities.

Either it will subtract and a positive result is obtained or it will This leads to the restoring division process illustrated in the following example: Align the most significant bits of the divisor and dividend. Add the 2's complement of the divisor to the dividend. If the most significant digit is 1 and Co- 0 the answer is negative.

Restore the dividend, shift it left and record the quotient bit Q -- Co If the most significant digit is 0 and Co - 1, the answer is positive, the subtraction is valid.

Repeat 2 , 3 , and 4 until the least significant digits of the dividend and divisor are aligned. They are the fixed point and floating point systems. In practice, in a fixed point system, binary numbers are expressed as fractions with the radix point positioned Number systems and codes 17 immediately right of the sign digit.

For example, in a machine using 8-bit registers Unfortunately there are problems associated with fixed point arithmetic.

Assuming 8-bit registers are being used in the machine, the range of the registers has been exceeded. The same problem exists for the multiplication and division operations. If two 8-bit numbers are multiplied, one by the other, then in many cases a double- length product will be formed and this would require a bit register.

Digital Logic Design Holdsworth

Similarly, for the division operations, a fractional quotient can only be formed if the divisor is greater than the dividend. To overcome the range problems experienced with fixed point representation a floating point system can be used.

Numbers in this system are expressed in the following form: When performing a computation, a normalised form of the mantissa is used. Normalisation is achieved by adjusting the exponent so that the mantissa has a 1 in its most significant digit position.

When this condition is satisfied: The principle of a biased exponent is perhaps more easily understood using the decimal system. Consider the following two decimal numbers: As a result at the interface between a digital device and the outside world facilities must be provided to convert pure binary to a decimal representation.

In practice, for example, calculators have been designed to work entirely in a decimal mode. In such cases decimal digits are represented by a string of binary digits referred to as a code.

Four bits are required to represent the ten decimal digits, and since there are 24 combinations of four binary digits, six combinations are not used and the code is said to contain redundancy. The four binary digits can be allocated to ten decimal digits in a purely arbitrary manner and it is possible to generate 2. The most common group of codes for representing decimal numbers are weighted and there are 17 of these codes.

Of this group the most commonly used weighted code is naturally binary coded decimal NBCD which uses the first ten combinations of the 4-bit binary count from to inclusive. The code weighting for NBCD is 8, 4, 2, 1 and this can be used to find the corresponding decimal value of a given code.

Such a code is the 8, 4, -2,-1 which, like the 2, 4, 2, 1 code, has the useful property of self-complementation.

By complementing each of the bits of a given codeword, a new codeword is formed which represents the 9's complement of the decimal digit represented by the original codeword.

Another example of a self-complementing code is the XS3 code. This is not a weighted code but contains combinations of natural binary in the range 3 10 to 12 The decimal value allocated to each binary code is defined to be 3 less than its actual value.

For example, 1 10 is represented by Decimal digit 0 1 2 3 4 5 6 7 8 9 NBCD 8,4,2,1 BCD 7,4,2,1 BCD BCD 2,4,2,1 8,4,-2,-1 Figure 1. Number systems and codes 19 Decimal digit Biquinary 2-out-of 5 0 1 2 3 4 5 O0 6 7 1O O0 8 O0 1O 9 Figure 1. Two examples of these are the 2-out-of-5 code and the biquinary code both of which are tabulated in Figure 1. It will be observed that each codeword in the 2-out-of-5 tabulation contains two l's and a single error that complements one of the bits will generate an invalid code.

The biquinary code is a weighted code where seven binary digits represent each of the decimal digits. The two most significant bits in each codeword, 01 and 10 indicate whether the digit represented is in the range 0 10 to 4 10 or 5 10 to 9 10 respectively. Each code combination contains only two l's and the complementation of a single bit in a code- word will generate an invalid code.

Examples of 1, 2, and 3-cubes are illustrated in Figure 1.

It will be observed from these diagrams that there is a single bit difference between the binary strings positioned at adjacent vertices. The distance between any two vertices on an n-cube is defined as the number of bit positions in which the two binary strings differ. Alternatively this is called the Hamming distance. A pair of adjacent vertices labelled and are a distance of 1 apart while the two binary strings and are a distance 2 apart.

A more formal approach to the concept of distance follows: The modulo-2 sum of two binary digits is given in the four following equations: The weight of a codeword g is defined as the number of l's contained in the word.

To improve the reliability of the system, methods are used to indicate the occurrence of an error and in some systems arrangements are made for both the detection and correction of errors. No Downloads. Views Total views. Actions Shares. Embeds 0 No embeds. No notes for slide. Book details Author: Newnes Language: English ISBN If you want to download this book, click link in the last page 5. You just clipped your first slide! Clipping is a handy way to collect important slides you want to go back to later.

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No Downloads. The division process to be described here is based on a well known technique used in digital machines for comparing the magnitudes of two numbers relative to one another. The corresponding octal equivalents for each group of three are then found in the conversion table.

The number system most familiar to man is the decimal system. A 3-bit code is tabulated in Figure 1.